The present invention is related to plasma processing systems. In particular, the present invention is related to determining whether a plasma processing system is ready for performing plasma processing.
Plasma processing systems, such as capacitively coupled plasma (CCP) systems, inductively coupled plasma (ICP) systems, and transformer coupled plasma (TCP) systems, are employed in various industries for fabricating devices on wafers. For example, the industries may include semiconductor, magnetic read/write and storage, optical system, and micro-electromechanical system (MEMS) industries. A plasma processing system may generate and sustain plasma in a plasma processing chamber to perform etching and/or deposition on a wafer such that device features may be formed on the wafer.
In general, changes in the plasma processing chamber caused by, for example, consumption of consumable materials, deformation of components, replacement of parts, etc., may negatively affect the performance of the plasma processing system in processing wafers. For example, if the wafers are processed under an inappropriate, suboptimal condition of the plasma processing system, parts of the plasma processing system may be damaged, a substantial number of the wafers may need to be scrapped and wasted, production time and other resources may be wasted, and/or the manufacturing yield may be undesirable. Therefore, it may be desirable to perform tests to ensure the readiness of the plasma processing system before processing wafers.
Conventionally, a number of test wafers may be test-processed with plasma in the plasma processing chamber, and the readiness of the plasma processing system may be determined based on the results of the test-processing. The test process may incur a substantial amount of cost and may consume a substantial amount of resources.
Alternatively, for saving cost and resources, plasma processing system readiness tests may be performed by comparing the measured electrical property values, such as the voltage, current, and/or phase angle value(s), at a certain location in the plasma processing system with a set of “fingerprints,” or known electrical property values which indicate the readiness of the plasma processing system. The consumption of resources for generating plasma and the consumption of test wafers may be avoided in the test process. However, the differences between the measured electrical property values and the fingerprints may be caused by various reasons, including problems with a power delivery system, but not limited to faults in the plasma processing chamber. As a result, false positive alarms indicating problems with the plasma processing chamber may be provided, and a significant amount of time and resources may be wasted in trying to troubleshoot the faultless plasma processing chamber.